Previewing the Beagle V

Beagleboard.org has joined forces with Seeed and StarFive to launch the Beagle V . The Beagle V has the advantage of being a low cost board that allows developers to access RISC V capability which has tremendous advantages in industrial IoT applications. The strategic idea behind the partnership is to bring RISC V capability to a much broader open source audience. Beagle V boards have already been released to developers for testing. In March this year, the board was made available to early developers and it is expected to be made generally available to the embedded community from September this year.

Hardware specifications of the Beagle V

The Beagle V is a RISC V computer designed to run Linux. The hardware specifications are impressive in the preview. The processor is a RISC-V U74 dual core with 2MB L2 cache with a CPU clock speed of 1Ghz. There is also a dedicated digital signal processor for computer vision called the Vision DSP Tensilica-VP6. There is also an NVDLA Engine 1 core with a configuration of 2048 MACs with a clock speed of 800Mhz. A Neural Network Engine is also integrated on board running at 1024MACs with a clock speed of 500Mhz. The beta board sports MicroSD for memory but the production board is expected to carry eMMC for memory.

Hardware overview of the Beaglebone V for Mender and OTA updates

Role of partners in the Beagle V project

If we look closely at the partnership behind the Beagle V project, we see that Seeed Studio has created a board with strong support for peripherals and other features. They also bring string customization capabilities to the table. StarFive has a track record for delivering the first system on chip (SoC) with computer vision based on Risc V technology, and the Jinghong MP version 7110 for SoC-centered computer vision and edge applications. Beagleboard.org supports the SoC and board roadmap and helps get this key functionality out to the open source community.

Read these articles on Beaglebone in an embedded Linux project:

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